EE PLD, 12 ns, PBGA100

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Product Information

Terminal Finish	TIN SILVER COPPER
Terminal Pitch	0.8000 mm
Clock Freq-Max (fclk)	52.6 MHz
Programmable Logic Type	EE PLD
Terminal Form	BALL
Operating Temperature-Max	70 Cel
Output Function	MACROCELL
Supply Voltage-Nom (Vsup)	3.3 V
Temperature Grade	COMMERCIAL
Package Shape	SQUARE
Status	ACTIVE
Lead Free	Yes
Operating Temperature-Min	0.0 Cel
Package Body Material	PLASTIC/EPOXY
Propagation Delay (tpd)	12 ns
Number of Functions	1
EU RoHS Compliant	Yes
Number of Dedicated Inputs	0.0
Supply Voltage-Max (Vsup)	3.6 V
Supply Voltage-Min (Vsup)	3 V
Organization	0 DEDICATED INPUTS, 64 I/O
Surface Mount	Yes
Mfr Package Description	0.80 MM PITCH, FBGA-100
Number of Terminals	100
Number of I/O Lines	64
Terminal Position	BOTTOM
Technology	CMOS
Package Style	GRID ARRAY, LOW PROFILE, FINE PITCH

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