EE PLD, 16.6 ns, CPGA280

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Product Information

Terminal Finish	TIN LEAD
Terminal Pitch	2.54 mm
Clock Freq-Max (fclk)	118 MHz
Programmable Logic Type	EE PLD
Terminal Form	PIN/PEG
Operating Temperature-Max	85 Cel
Output Function	MACROCELL
Supply Voltage-Nom (Vsup)	5 V
Temperature Grade	INDUSTRIAL
Package Shape	SQUARE
Status	ACTIVE
Operating Temperature-Min	-40 Cel
Package Body Material	CERAMIC, METAL-SEALED COFIRED
Propagation Delay (tpd)	16.6 ns
Number of Functions	1
Number of Dedicated Inputs	0.0
Supply Voltage-Max (Vsup)	5.5 V
Supply Voltage-Min (Vsup)	4.5 V
Organization	0 DEDICATED INPUTS, 216 I/O
Mfr Package Description	CERAMIC, PGA-280
Number of Terminals	280
Number of I/O Lines	216
Terminal Position	PERPENDICULAR
Technology	CMOS
Package Style	GRID ARRAY

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